We’re happy to announce the launch of Raspberry Pi Pico 2, our second-generation microcontroller board, built on RP2350: a new high-performance, secure microcontroller designed here at Raspberry Pi.

With a higher core clock speed, twice the memory, more powerful Arm cores, new security features, and upgraded interfacing capabilities, Pico 2 delivers a significant performance and feature uplift, while retaining hardware and software compatibility with earlier members of the Pico series.

Pico 2 is on sale now, priced at $5.

RP2040: the engineer’s microcontroller

Back in January 2021, we surprised everyone with the launch of the original Pico, and our RP2040 microcontroller. In the three and a half years since, we’ve sold nearly four million units of Pico and its wireless-enabled sibling Pico W. RP2040 itself has found a home in countless third-party development boards, and in OEM products from pinball tables to synthesizers.

We’ve used a lot of other microcontrollers over the years, and we built RP2040 to be the microcontroller we’d always wanted: two fast 32-bit cores, lots of on-chip RAM, and flexible interfacing – courtesy of our programmable I/O (PIO) subsystem – all tied together by deterministic bus fabric which lets the best developers squeeze every drop of concurrent power out of the system. We’ve seen some amazing demonstrations of that power: from our very own Graham Sanderson’s port of DOOM; to Dmitry Grinberg’s port of PalmOS; to Kevin Vance’s “CPU-less” Commodore 64 cartridge.

But while RP2040 has succeeded beyond our wildest dreams, we always knew we could do better. There were features on our own list that didn’t make the cut first time round: on-chip storage; lower-power idle states; package options. And there were new features requested by the army of RP2040 users: faster cores; more RAM; code protection.

Enter RP2350

So, two years ago, with the RP1 I/O controller for Raspberry Pi 5 in the bag, the Raspberry Pi chip team started work on what would become RP2350. This is a vastly more sophisticated design than RP2040, featuring:

• Two 150MHz Arm Cortex-M33 cores, with floating point and DSP support
• 520KB of on-chip SRAM in ten concurrently accessible banks
• A comprehensive security architecture, built around Arm TrustZone for Cortex-M, and including:
  • Signed boot support
  • 8KB of on-chip antifuse one-time-programmable (OTP) memory
  • SHA-256 acceleration
  • A hardware true random number generator (TRNG)
• An on-chip switch-mode power supply and low-quiescent-current LDO
• Twelve upgraded PIO state machines
• A new HSTX peripheral for high-speed data transmission
• Support for external QSPI PSRAM

Where RP2040 provides only a single 7×7mm, QFN56 package option, this time we’re offering a choice: a 7×7mm, QFN60 package (RP2350A) with 30 GPIOs, or a 10×10mm, QFN80 package (RP2350B) with 48 GPIOs; and variants of each with 2MB of stacked-in-package QSPI flash (RP2354A and RP2354B). 

And we’ve stayed true to our affordable roots: although our silicon die now measures an extravagant 5.3mm², versus 2.7mm² for RP2040, RP2350A will be just ten cents more expensive, costing $0.80 in 3,400-unit reels, or $1.10 in single-unit quantities. RP2350B will cost ten cents more than RP2350A, while the RP2354 variants will cost just twenty cents more than their flashless brethren.

RP2350 will be generally available in volume before the end of 2024. To register your interest, and to participate in our samples program, head over to the product page.

Board games

Pico 2 pairs RP2350A with 4MB of external QSPI flash, up from 2MB on the original Pico. It is form-factor and electrically compatible with the original Pico design.

While there is relatively little stock in channel today, Pico 2 is in full-rate production with our friends at Sony. Many of our Approved Reseller partners are operating backorder and reservation schemes, and we will be shipping units to them on a regular basis over the next few weeks.

Before the end of the year, we expect to ship a wireless-enabled Pico 2 W, using the same Infineon 43439 modem as Pico W, and versions of both Pico 2 and Pico 2 W with pre-installed 0.1-inch headers.

Software and documentation

Raspberry Pi is as much a software company as it is a hardware company: developers experience our hardware products through the lens of our software platforms, and we spend an enormous amount of time and money on polishing those platforms.

As you’d expect, the launch of Pico 2, and RP2350, is accompanied by an updated release of the Pico SDK, and by new MicroPython and CircuitPython images. And Jonathan Pallant and his co-conspirators have been working to bring the Rust language to our new platform.

We’ve been collaborating with the Trusted Firmware project to establish RP2350 as the reference hardware platform for the Trusted Firmware-M 2.1.0 Long Term Support release. TF-M provides a reference implementation for PSA Certified on Arm v8-M chips, providing developers with an easy route to secure devices against common attacks. RP2350 will be laboratory tested by a certified, independent lab, with the goal of achieving PSA Certified Level 2 ahead of a release in October.

Finally, we’re pleased to be teaming up with Google to launch the Pigweed SDK with native support for Pico 2. Pigweed’s middleware libraries have shipped in millions of devices, including Google’s own Pixel devices and Nest thermostats. Now, the Pigweed SDK makes it even easier for you to use these components when building your projects for Pico 2. Head over to Google’s announcement page to learn more!

As with all our silicon products, RP2350 is accompanied by a comprehensive datasheet. We’re also providing a tutorial showing you how to get started with C/C++ development using the newly updated Raspberry Pi Pico Visual Studio Code extension.

Painting a target on our backs

The cornerstone of the RP2350 security model is signed boot. If security is enabled, it is only possible to boot a binary if it has been signed using a private key, with a hash of the corresponding public key stored in OTP. Preventing an attacker from running arbitrary code greatly complicates the task of extracting OTP contents, including cryptographic keys used for code protection.

Other vendors’ track record in implementing boot security is pretty dismal. Broad-market microcontrollers often lack effective countermeasures against modern fault-injection attacks, such as those employed in LimitedResults’ Debug Resurrection attack on Nordic nRF52 devices, and Chris Gerlinsky’s work on bypassing Code Read Protection in NXP LPC family devices.

While RP2350 uses several techniques, including hardware fast glitch detectors and our patent-pending redundancy coprocessor, to protect control flow and data integrity against fault-injection attacks, we fully expect to find, and fix, flaws in our boot process. And we want to find these flaws early, before RP2350 is deployed in critical applications.

Ahead of launch, we commissioned NewAE and Hextree to audit our security architecture. And now we’re offering a $10,000 bounty for the first confirmed break of our signed boot process. This will run for a month in the first instance: we may extend the window if no flaw is found, or offer further bounties for further distinct flaws. Full details of the bounty program can be found here.

To get RP2350 hardware into the hands of the engineers most likely to find these flaws, we’ve partnered with the DEF CON hacking convention, which starts today in Las Vegas. This year’s badge is powered by RP2350, and makes a great platform for experimenting with our security architecture. And for anyone who wants to participate, but doesn’t want to risk bricking their badge, Hextree have produced a limited number of boards intended specifically for supply-rail and electromagnetic glitching.

Our team will be camped out alongside Hextree in the Embedded Systems Village during the conference: come on down and say hi!